Biasing JFETs, AGC IF and other fun

The W7ZOI tutorial on JFET biasing is a great place to start if you are looking to understand JFETs and use them in practical circuits. I encourage you to buy Experimental Methods, but the JFET biasing sidebar is reproduced on the popcorn site while you wait for the book to ship from the ARRL.

I wrote a simple calculator that implements this source resistor self-biasing. All you need do is measure your JFETs Idss and Vp then plug in the numbers to the calculator which will then spit out the source resistor required and the transconductance of the FET when biased like this.

I characterised three different JFETs from my collection, the MPF102, the J310 and the 2N5484. The J310s I tested gave an Idss of around 100 mA! This is far outside their datasheet spread of 24-60 mA, so I repeated the measurement several times on three randomly selected devices and played with biasing in trial circuits. The math was consistent, which makes me wonder about my particular batch of J310s. The J310 is obsolete, so perhaps these aren't NOS, but rebadged modern devices. I got them off eBay from a seller I trust. I guess the higher saturation current is actually a blessing, making them more useful at higher powers.

JFET Biasing Properties

I selected 2N5484 for my AGC IF experiments, its lower Vp sounded easier to generate with a single diode detector, but this and their relatively low transconductance would limit the AGC range achievable. I picked an Id around 2 mA for the quiescent bias which is achieved with an Rs of 330 Ohms.

A very straight-forward JFET IF circuit was constructed, using a set of 455 kHz IF cans, the line-up being white into the 1st FET gate, yellow in its drain and the 2nd FETs gate, and black in the 2nd FETs drain feeding the detector. The untuned sides were placed in the drains, this was against my initial instinct, especially for the detector, but it seems to work fine. The IF cans themselves are designed for lower impedance BJT devices, so the design is sub-optimal, but it offers a reasonable 40 dB or so of dynamic range.

Circuit Diagram

The AGC voltage is applied to the decoupled cold-side of the gate resonators. The AGC time constant is quite short, but I prefer it that way. Without AGC the circuit is actually slightly unstable, with at least 33 Ohms needed in the drain circuit of the second stage for stability, but once the AGC rail is unshorted it floats about -0.12 volts and the IF amplifier works great. The AGC rail swings down to about -1.8 volts before the dynamic range of the amplifier is exceeded and gain compression begins at the second stage, the distortion becoming severe by 2 volts below ground.

Experimental IF Implementation

The remaining red oscillator IFT could be used to build an autodyne converter for a front end, completing a MW receiver with only two more active devices (one for the AF-side as well). However, this IF stage might find use in the 80 Meter Challenge receiver, if I ever finish that!